URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [t48/] [tags/] [rel_1_0/] - Rev 78

Rev	Log message	Author	Age	Path
58	add periodic interrupt	arniml	7424d 10h	/t48/tags/rel_1_0/
57	abort if no interrupt occurs	arniml	7424d 10h	/t48/tags/rel_1_0/
56	wait for instruction strobe after final end-of-simulation detection this ensures that the last mov instruction is part of the dump and enables 100% matching with i8039 simulator	arniml	7425d 12h	/t48/tags/rel_1_0/
55	add dependency to tb_behav_pack for decoder	arniml	7425d 12h	/t48/tags/rel_1_0/
54	- add tb_istrobe_s	arniml	7425d 12h	/t48/tags/rel_1_0/
53	make istrobe visible through testbench package	arniml	7425d 12h	/t48/tags/rel_1_0/
52	+ fix bug in PSW[3] + read SP properly for dump	arniml	7425d 12h	/t48/tags/rel_1_0/
51	+ implement Port1 and Port2 + connect T0 and T1 + return proper program memory contents	arniml	7425d 12h	/t48/tags/rel_1_0/
49	Imported sources	arniml	7430d 13h	/t48/tags/rel_1_0/
48	update copyright notice	arniml	7430d 13h	/t48/tags/rel_1_0/