URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [t48/] [tags/] [rel_1_1/] [rtl/] - Rev 205

Rev	Log message	Author	Age	Path
164	initial check-in	arniml	7031d 18h	/t48/tags/rel_1_1/rtl/
162	Fix bug report: "Wrong clock applied to T0" t0_o is generated inside clock_ctrl with a separate flip-flop running with xtal_i	arniml	7032d 17h	/t48/tags/rel_1_1/rtl/
161	fix syntax problem that triggers an error with GHDL 0.18	arniml	7063d 22h	/t48/tags/rel_1_1/rtl/
157	removed obsolete constant	arniml	7184d 18h	/t48/tags/rel_1_1/rtl/
156	added hierarchy t8039_notri	arniml	7184d 18h	/t48/tags/rel_1_1/rtl/
155	initial check-in	arniml	7184d 18h	/t48/tags/rel_1_1/rtl/
153	introduced generic gate_port_input_g forces masking of P1 and P2 input bus	arniml	7185d 15h	/t48/tags/rel_1_1/rtl/
150	intruduced hierarchy t8048_notri where all system functionality except bidirectional ports is handled	arniml	7186d 14h	/t48/tags/rel_1_1/rtl/
149	update	arniml	7186d 14h	/t48/tags/rel_1_1/rtl/
148	initial check-in	arniml	7186d 14h	/t48/tags/rel_1_1/rtl/