URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [t48/] [tags/] [rel_1_2/] [bench/] [vhdl/] - Rev 300

Rev	Log message	Author	Age	Path
110	exchange syn_rom for lpm_rom	arniml	7356d 22h	/t48/tags/rel_1_2/bench/vhdl/
103	add testbench peripherals for P1 and P2 this became necessary to observe a difference between externally applied port data and internally applied port data	arniml	7360d 18h	/t48/tags/rel_1_2/bench/vhdl/
83	connect if_timing to P2 output of T48	arniml	7382d 12h	/t48/tags/rel_1_2/bench/vhdl/
82	check expander timings	arniml	7382d 12h	/t48/tags/rel_1_2/bench/vhdl/
81	initial check-in	arniml	7382d 17h	/t48/tags/rel_1_2/bench/vhdl/
80	added if_timing	arniml	7382d 17h	/t48/tags/rel_1_2/bench/vhdl/
68	connect T0 and T1 to P1	arniml	7389d 14h	/t48/tags/rel_1_2/bench/vhdl/
67	initial check-in	arniml	7389d 14h	/t48/tags/rel_1_2/bench/vhdl/
56	wait for instruction strobe after final end-of-simulation detection this ensures that the last mov instruction is part of the dump and enables 100% matching with i8039 simulator	arniml	7393d 12h	/t48/tags/rel_1_2/bench/vhdl/
33	rename pX_limp to pX_low_imp	arniml	7409d 13h	/t48/tags/rel_1_2/bench/vhdl/