URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [t48/] [tags/] [rel_1_4/] - Rev 127

Rev	Log message	Author	Age	Path
107	tie EA to '1'	arniml	7387d 06h	/t48/tags/rel_1_4/
106	clean-up use of ea_i	arniml	7387d 06h	/t48/tags/rel_1_4/
105	initial check-in describe bugs of release 0.1 BETA	arniml	7389d 16h	/t48/tags/rel_1_4/
104	add white_box directory to test suite	arniml	7390d 13h	/t48/tags/rel_1_4/
103	add testbench peripherals for P1 and P2 this became necessary to observe a difference between externally applied port data and internally applied port data	arniml	7390d 13h	/t48/tags/rel_1_4/
102	update for changes in address space of external memory	arniml	7390d 13h	/t48/tags/rel_1_4/
101	assert p2_read_p2_o when expander port is read	arniml	7390d 13h	/t48/tags/rel_1_4/
100	reorder data_o generation	arniml	7390d 13h	/t48/tags/rel_1_4/
99	initial check-in	arniml	7390d 13h	/t48/tags/rel_1_4/
98	Fix bug "ANL and ORL to P1/P2 read port status instead of port output register"	arniml	7390d 14h	/t48/tags/rel_1_4/