URL https://opencores.org/ocsvn/t6507lp/t6507lp/trunk

Subversion Repositories t6507lp

[/] [t6507lp/] [trunk/] [rtl/] [verilog/] - Rev 126

Rev	Log message	Author	Age	Path
101	Absolute indirect addressing mode is coded and simulated.	creep	5586d 00h	/t6507lp/trunk/rtl/verilog/
100	IDY WRITE TYPE instructions are coded and simulated.	creep	5586d 01h	/t6507lp/trunk/rtl/verilog/
99	Only Package.v should be used.	creep	5586d 02h	/t6507lp/trunk/rtl/verilog/
98	Updated status and some comments.	creep	5586d 02h	/t6507lp/trunk/rtl/verilog/
97	Removed obsolete TODO.	creep	5586d 02h	/t6507lp/trunk/rtl/verilog/
96	IDY READ TYPE instructions are coded and simulated. IDY WRITE TYPE instructions are coded but still requires simulation.	creep	5588d 17h	/t6507lp/trunk/rtl/verilog/
95	IDX addressing mode is also 100%, coded and simulated.	creep	5588d 21h	/t6507lp/trunk/rtl/verilog/
94	Relative addressing mode is almost 100% functional. It just needs another test to check if the adrres_plus_index logic is not recalculating the pc in two consecutive cycles.	creep	5589d 18h	/t6507lp/trunk/rtl/verilog/
93	Opcode for BNE was wrong.	creep	5589d 19h	/t6507lp/trunk/rtl/verilog/
92	Absolute indexed mode working properly. All cases were simulated.	creep	5590d 00h	/t6507lp/trunk/rtl/verilog/