URL https://opencores.org/ocsvn/t6507lp/t6507lp/trunk

Subversion Repositories t6507lp

[/] [t6507lp/] [trunk/] [rtl/] [verilog/] - Rev 62

Rev	Log message	Author	Age	Path
34	Fixed state names.	creep	5608d 03h	/t6507lp/trunk/rtl/verilog/
33	Some portion of the absolute indexed mode is done, yet is fully nonfunctional.	creep	5608d 03h	/t6507lp/trunk/rtl/verilog/
32	Documentation is wrong. I`ve just kept the standard. Some ALU operations are not working 100%. Most of them don`t affect Processor Status Register yet. However the main body will be like this. :D	gabrieloshiro	5608d 03h	/t6507lp/trunk/rtl/verilog/
31	Added zero page indexed mode.	creep	5608d 04h	/t6507lp/trunk/rtl/verilog/
30	Added zero page mode.	creep	5608d 04h	/t6507lp/trunk/rtl/verilog/
29	Absolute addressing mode should be working.	creep	5608d 06h	/t6507lp/trunk/rtl/verilog/
28	More documentation.	gabrieloshiro	5608d 06h	/t6507lp/trunk/rtl/verilog/
27	Added the pipelining support for a few addressing modes. Still working on absolute addressing mode.	creep	5608d 06h	/t6507lp/trunk/rtl/verilog/
26	I`m still finishing the documentation. But the file should work by now.	gabrieloshiro	5611d 00h	/t6507lp/trunk/rtl/verilog/
25	Package file contains all important constants and local parameters. It assigns constant values for opcodes aliases, processor status register indexes, and addressing modes. It is going to help people to understand the code. T65 project has a lot of constants inside its codes. So it is hard to understand it.	gabrieloshiro	5611d 02h	/t6507lp/trunk/rtl/verilog/