URL https://opencores.org/ocsvn/tv80/tv80/trunk

Subversion Repositories tv80

[/] [tv80/] [trunk/] - Rev 99

Rev	Log message	Author	Age	Path
77	Added back files lost after server crash	ghutchis	6832d 18h	/tv80/trunk/
75	Modified environment I/O so multicycle wr_n signals are only seen as a single write.	ghutchis	6912d 00h	/tv80/trunk/
74	Changed default for T2Write to be 1, to match expected behavior for most users.	ghutchis	6912d 01h	/tv80/trunk/
73	Added RC4 encrypt/decrypt test	ghutchis	6923d 20h	/tv80/trunk/
72	Added copyright header	ghutchis	6923d 20h	/tv80/trunk/
71	Ported UART from T80	ghutchis	6985d 00h	/tv80/trunk/
70	Added test for T16450 UART	ghutchis	7035d 18h	/tv80/trunk/
69	Added UART instance in testbench, and added UART to compile list.	ghutchis	7035d 18h	/tv80/trunk/
68	Updated nwtest to reflect changes in register interface to simple_gmii. In particular, interrupt bits for packet arrival and sending now need to be explicitly cleared afterwards.	ghutchis	7043d 19h	/tv80/trunk/
67	Updated register generator based on testing with simple_gmii. Changed how interrupt output mux is created, fixed many bugs.	ghutchis	7043d 19h	/tv80/trunk/