URL https://opencores.org/ocsvn/xgate/xgate/trunk

Subversion Repositories xgate

[/] [xgate/] - Rev 76

Rev	Log message	Author	Age	Path
56	Extensive changes to testbench and the Xgate master bus interface and the way the RISC handles wait states.	rehayes	5272d 23h	/xgate/
55	Minor change to instruction set details.	rehayes	5272d 23h	/xgate/
54	complete rewrite of the bus arbitration module. Moved system test registers to new WISHBONE slave module.	rehayes	5272d 23h	/xgate/
53	Extensive changes to fix errors in how wait state are handled by the master bus interface and the RISC control logic. Fix to slave mode WISHBONE ack signal.	rehayes	5273d 00h	/xgate/
52	Minor changes to aide waveform debug	rehayes	5273d 00h	/xgate/
51	Corrections to ADC and SBC instructions, First pass at documentaion instruction set details	rehayes	5288d 20h	/xgate/
50	incremental update to match status bit changes	rehayes	5288d 20h	/xgate/
49	First pass with instruction set details	rehayes	5288d 20h	/xgate/
48	Update for SBC ana ADC condition code changes	rehayes	5288d 20h	/xgate/
47	Fix status bit error in ADC and SBC instruction, fix error in thread startup.	rehayes	5288d 21h	/xgate/