URL https://opencores.org/ocsvn/xgate/xgate/trunk

Subversion Repositories xgate

[/] [xgate/] - Rev 92

Rev	Log message	Author	Age	Path
72	Code cleanup, eliminated index 0 of input and output interrupts.	rehayes	5151d 15h	/xgate/
71	Added irq bypass registers to rtl, testbench and doc.	rehayes	5152d 17h	/xgate/
70	Updated with interrupt bypass controll registers.	rehayes	5152d 17h	/xgate/
69	New test to verify irq interrupt priority encoder.	rehayes	5152d 17h	/xgate/
68	Added new test for interrupt priority and updated WISHBONE slave module with semaphore register.	rehayes	5152d 18h	/xgate/
67	Added irq bypass function and controll registers. Made lowest interrupt index highest priority.	rehayes	5152d 18h	/xgate/
66	Fix testbench and RISC core related to debug mode and wait states.	rehayes	5172d 14h	/xgate/
65	Parameterize delays based on number of RAM wait states.	rehayes	5172d 14h	/xgate/
64	Fixed more bugs related to wait states and debug mode.	rehayes	5172d 14h	/xgate/
63	Remove historical output ports that are no longer used.	rehayes	5182d 13h	/xgate/