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[/] [xgate/] [trunk/] - Rev 76

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Rev Log message Author Age Path
56 Extensive changes to testbench and the Xgate master bus interface and the way the RISC handles wait states. rehayes 5291d 18h /xgate/trunk/
55 Minor change to instruction set details. rehayes 5291d 18h /xgate/trunk/
54 complete rewrite of the bus arbitration module. Moved system test registers to new WISHBONE slave module. rehayes 5291d 18h /xgate/trunk/
53 Extensive changes to fix errors in how wait state are handled by the master bus interface and the RISC control logic. Fix to slave mode WISHBONE ack signal. rehayes 5291d 18h /xgate/trunk/
52 Minor changes to aide waveform debug rehayes 5291d 18h /xgate/trunk/
51 Corrections to ADC and SBC instructions, First pass at documentaion instruction set details rehayes 5307d 14h /xgate/trunk/
50 incremental update to match status bit changes rehayes 5307d 14h /xgate/trunk/
49 First pass with instruction set details rehayes 5307d 15h /xgate/trunk/
48 Update for SBC ana ADC condition code changes rehayes 5307d 15h /xgate/trunk/
47 Fix status bit error in ADC and SBC instruction, fix error in thread startup. rehayes 5307d 15h /xgate/trunk/

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