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[/] [xulalx25soc/] - Rev 112

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92 Fixes the problem whereby the master counters show when the user counters should
be showing and vice versa. Now the master counters show by default, together
with their correct labels. User counters are still available by pressing
'u' in the debugger, and the master counter display may be returned to by
pressing 'm' in the debugger.		 dgisselq 2924d 06h /xulalx25soc/
91 Fixes bugs associated with an overflow of write acknowledgements in the
receiver. This helps keep our accesses aligned.		 dgisselq 2924d 06h /xulalx25soc/
90 Reads and writes to the SD over SPI port now work. The card appears, as of now,
to be fully functional.		 dgisselq 2924d 06h /xulalx25soc/
89 Bug fixes, following the adf_ce logic combining ALU/DIVIDE/FPU pipeline logic
into one register, this fixes that logic so that instructions without their
condition fulfilled are still "executed" and marked as done.		 dgisselq 2924d 06h /xulalx25soc/
88 Adjusted copyright date. dgisselq 2924d 06h /xulalx25soc/
87 Placed the interrupt into the carry chain for less logic area. dgisselq 2924d 06h /xulalx25soc/
86 Fine tuning the `defines, so that you can build pipelined without pipelined
bus access and so forth.		 dgisselq 2924d 06h /xulalx25soc/
85 First version of the SD-SPI interface, with partial functionality. (No the
empty link that was here before.)		 dgisselq 2928d 03h /xulalx25soc/
84 First part of switching to proper sdspi.v, and not just the link. dgisselq 2928d 03h /xulalx25soc/
83 Fixes a bug in the LX9 build whereby the flash was never ever granted permission
to use the SPI port.		 dgisselq 2929d 07h /xulalx25soc/

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