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[/] [xulalx25soc/] - Rev 114

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94 Fixes a bug which had caused the device to die artificially and early, just
simply because the program connecting to the simulator shut its pipe down before
getting our last message. We now ignore this signal and continue.		 dgisselq 2931d 13h /xulalx25soc/
93 Oops -- missed adjusting the copyright. dgisselq 2931d 14h /xulalx25soc/
92 Fixes the problem whereby the master counters show when the user counters should
be showing and vice versa. Now the master counters show by default, together
with their correct labels. User counters are still available by pressing
'u' in the debugger, and the master counter display may be returned to by
pressing 'm' in the debugger.		 dgisselq 2931d 14h /xulalx25soc/
91 Fixes bugs associated with an overflow of write acknowledgements in the
receiver. This helps keep our accesses aligned.		 dgisselq 2931d 14h /xulalx25soc/
90 Reads and writes to the SD over SPI port now work. The card appears, as of now,
to be fully functional.		 dgisselq 2931d 14h /xulalx25soc/
89 Bug fixes, following the adf_ce logic combining ALU/DIVIDE/FPU pipeline logic
into one register, this fixes that logic so that instructions without their
condition fulfilled are still "executed" and marked as done.		 dgisselq 2931d 14h /xulalx25soc/
88 Adjusted copyright date. dgisselq 2931d 14h /xulalx25soc/
87 Placed the interrupt into the carry chain for less logic area. dgisselq 2931d 14h /xulalx25soc/
86 Fine tuning the `defines, so that you can build pipelined without pipelined
bus access and so forth.		 dgisselq 2931d 14h /xulalx25soc/
85 First version of the SD-SPI interface, with partial functionality. (No the
empty link that was here before.)		 dgisselq 2935d 11h /xulalx25soc/

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