URL https://opencores.org/ocsvn/xulalx25soc/xulalx25soc/trunk

Subversion Repositories xulalx25soc

[/] [xulalx25soc/] [trunk/] [sw/] - Rev 108

Rev	Log message	Author	Age	Path
28	Oops--two files needed by zipdbg weren't originally placed in the directory.	dgisselq	3020d 22h	/xulalx25soc/trunk/sw/
25	Fixing compile time warnings.	dgisselq	3020d 23h	/xulalx25soc/trunk/sw/
24	Added the #define necessary to enable (and clear) SCOPE interrupts.	dgisselq	3026d 21h	/xulalx25soc/trunk/sw/
17	Some basic updates, to include adding in a missing file (zipstate). Most of these updates include making sure that the XuLA2 device can be accessed via the USB. (Prior versions accessed the FPGA via serial port or network ...)	dgisselq	3085d 22h	/xulalx25soc/trunk/sw/
13	This version is now working. (It probably would've worked before, but everything is now working.)	dgisselq	3087d 18h	/xulalx25soc/trunk/sw/
11	Getting software up and running on the board for the first time. (Not there yet, but I think these items have now proven themselves.)	dgisselq	3087d 21h	/xulalx25soc/trunk/sw/
7	Mostly minor changes. Fixed the legal copyright statement in the UART files, adjusted some comments, and made sure that the zipdbg program contained all the latest features from our Vault.	dgisselq	3090d 07h	/xulalx25soc/trunk/sw/
5	Initial software version, in support of the project. At this point, they are provided with no guarantees that they work. (They did use to work--on an older build, but I haven't been able to verify that they work with this newer build yet.)	dgisselq	3090d 17h	/xulalx25soc/trunk/sw/