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[/] [xulalx25soc/] [trunk/] [sw/] - Rev 109

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29 This adds a vastly updated and superious ziprun capability to the repository.
ziprun now accepts ELF program files *only*, reads them, and places them onto
the board. This includes the ability, within the ELF file, of specifying
whether or not the data is sent to block ram, SD ram, or Flash, as well as
the ability of specifying the initial address. (Of course, that's a one time
thing--to always have the same initial address, set the address in
rtl/busmaster.v)		 dgisselq 3017d 08h /xulalx25soc/trunk/sw/
28 Oops--two files needed by zipdbg weren't originally placed in the directory. dgisselq 3017d 12h /xulalx25soc/trunk/sw/
25 Fixing compile time warnings. dgisselq 3017d 13h /xulalx25soc/trunk/sw/
24 Added the #define necessary to enable (and clear) SCOPE interrupts. dgisselq 3023d 11h /xulalx25soc/trunk/sw/
17 Some basic updates, to include adding in a missing file (zipstate). Most of
these updates include making sure that the XuLA2 device can be accessed via
the USB. (Prior versions accessed the FPGA via serial port or network ...)		 dgisselq 3082d 12h /xulalx25soc/trunk/sw/
13 This version is now working. (It probably would've worked before, but
everything is now working.)		 dgisselq 3084d 08h /xulalx25soc/trunk/sw/
11 Getting software up and running on the board for the first time. (Not there
yet, but I think these items have now proven themselves.)		 dgisselq 3084d 10h /xulalx25soc/trunk/sw/
7 Mostly minor changes. Fixed the legal copyright statement in the UART files,
adjusted some comments, and made sure that the zipdbg program contained all
the latest features from our Vault.		 dgisselq 3086d 21h /xulalx25soc/trunk/sw/
5 Initial software version, in support of the project. At this point, they are
provided with no guarantees that they work. (They did use to work--on an older
build, but I haven't been able to verify that they work with this newer build
yet.)		 dgisselq 3087d 07h /xulalx25soc/trunk/sw/

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