OpenCores
URL https://opencores.org/ocsvn/zipcpu/zipcpu/trunk

Subversion Repositories zipcpu

[/] [zipcpu/] - Rev 118

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
98 Added justed longjump instructions from the previous (not used, broken)
functionality to the new LOD (PC),PC functionality.		 dgisselq 3026d 21h /zipcpu/
97 Added longjump instructions. dgisselq 3026d 21h /zipcpu/
96 Added the longjump functionality, so that the assembler will properly assemble
instructions to arbitrary 32-bit addresses.		 dgisselq 3026d 21h /zipcpu/
95 Fixed a bug whereby a mistaken code for CLR was masking a valid LDI of a large
integer value.		 dgisselq 3029d 03h /zipcpu/
94 These changes make it possible to build binutils-2.25/ here in this
directory. "make binutils" should be all that is necessary to build the
entire binutils package for the Zip CPU.

The default configure script, run from gas-script.sh below, will build and
install these utilities in an install/ subdirectory made below sw/.		 dgisselq 3054d 00h /zipcpu/
93 A BINUTILS BACKEND IS NOW AVAILABLE!!!! dgisselq 3061d 22h /zipcpu/
92 Adjustments made to match the simplified early branching. dgisselq 3061d 22h /zipcpu/
91 Minor updates. dgisselq 3061d 22h /zipcpu/
90 Removed MOV x(PC),PC from the list of possible early branching instructions.
ADD X,PC and LDI X,PC are now the only recognized early branching instructions.
This was done to spare logic, although I don't think I spared more than a
LUT or two.		 dgisselq 3061d 22h /zipcpu/
89 Minor changes, to include making default branching an ADD.[condition] X,PC
instruction, rather than allowing both MOV X(PC),PC and ADD X,PC instructions.

Further zopcodes.cpp contains several bug fixes.		 dgisselq 3061d 22h /zipcpu/

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.