OpenCores
URL https://opencores.org/ocsvn/amber/amber/trunk

Subversion Repositories amber

[/] - Rev 56

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
36 Changed boot_mem for the a25 system to be 128 bits wide to match the 128-bit wide wishbone bus csantifort 4785d 17h /
35 Amber25 improvements:
Use 128-bit wishbone bus, instead of 32-bit to reduce cache miss fetch times
Use a fast barrel shifter for shifts between 0 and 4 to improve timing
Use a 2 cycle full barrel shifter for complex shifts
csantifort 4787d 01h /
34 Tweaked strcpy function to speed it up slightly csantifort 4787d 22h /
33 Fixed bug in div assembly function. Handles negative numbers correctly.
Fixed bug in printf function, negative numbers now print correctly.
csantifort 4788d 18h /
32 Added clock cycle counting register to test_module to support dhrystone performance measurement csantifort 4789d 18h /
31 Added dhrystone benchmark test csantifort 4789d 18h /
30 Bug fix - a write access was sometimes dropped when it was in a sequence of writes with variable wb_ack delays csantifort 4803d 01h /
29 Use lgo command for saving waveforms in modelsim csantifort 4804d 18h /
28 Moved function prototypes to .h file csantifort 4804d 19h /
27 Got working with cadence nc simulator csantifort 4838d 02h /

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.