URL https://opencores.org/ocsvn/ion/ion/trunk

Subversion Repositories ion

[/] - Rev 57

Rev	Log message	Author	Age	Path
37	functions added to package for standard address decoding	ja_rd	4917d 07h	/
36	pre-generated simulation test bench TB1 updated for compatibility to other changes	ja_rd	4917d 07h	/
35	CPU mem_wait logic updated to work with cache	ja_rd	4917d 08h	/
34	default data address moved to 0x80000000 makefiles and readme files updated accordingly	ja_rd	4917d 08h	/
33	bin2hdl now can initialize 16-bit wide memories	ja_rd	4917d 08h	/
32	slite: catch 1-instruction endless loops now can run unattended; will stop at the end of main()	ja_rd	4917d 09h	/
31	Major refactor in slite: supports memory map with more than 1 block indentation made homogeneous unused code removed	ja_rd	4917d 09h	/
30	Completed decoding of instructions (to prevent side effects of invalid opcodes)	ja_rd	4919d 05h	/
29	opcode test updated: supports CP0 cause register and traps in delay slots tests that traps abort next instruction in all cases	ja_rd	4919d 06h	/
28	Core updated: supports CP0 cause register and traps in delay slots traps abort next instruction in all cases (incl. jumps/L/S)	ja_rd	4919d 06h	/