URL https://opencores.org/ocsvn/ion/ion/trunk

Subversion Repositories ion

[/] - Rev 85

Rev	Log message	Author	Age	Path
65	Fixed io input mux in MPU template 1	ja_rd	4909d 04h	/
64	Refactored memory decoding logic (wait states and read-only attributes unimplemented yet)	ja_rd	4909d 04h	/
63	DE-1 demo top module: added registers for SD interface, switches and 7-seg display	ja_rd	4909d 04h	/
62	CPU fixed: fixed bug in EPC load logic relative to mem_wait stalls parametrized reset and trap vector addresses	ja_rd	4909d 04h	/
61	SW simulator updated: new mips-1 memory map and trap addresses slightly better command line argument parsing	ja_rd	4909d 04h	/
60	Forgot to upload new TB package!! Without this, simulations don't work...	ja_rd	4909d 05h	/
59	cleaned up top vhdl module of demo moved reset sync ff chain to top module updated pre-generated demo file	ja_rd	4910d 18h	/
58	Cleaned up cache stub code	ja_rd	4911d 05h	/
57	updated precompiled demo: single 32-bit BROM instead of 4x8-bit	ja_rd	4911d 06h	/
56	synthesis mpu template updated: BRAM is now one 32-bit-wide block instead of 4 8-bitters (it is read only) python script updated accordingly	ja_rd	4911d 06h	/