URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] - Rev 122

Rev	Log message	Author	Age	Path
102	Fixed bug reported by Mihai ( http://opencores.org/bug,view,1955 ). The following PUSH instructions are now working as expected: - indexed mode: PUSH x(R1) - indirect register mode: PUSH @R1 - indirect autoincrement: PUSH @R1+	olivier.girard	4843d 07h	/
101	Cosmetic change in order to prevent an X propagation whenever executing a byte instruction with an uninitialized memory location as source.	olivier.girard	4843d 09h	/
100	Update HTML documentation with Actel's FPGA implementation example (file & directory description section).	olivier.girard	4846d 08h	/
99	Small fix for CVER simulator support.	olivier.girard	4847d 09h	/
98	Added support for VCS verilog simulator. VPD and TRN waveforms can now be generated.	olivier.girard	4847d 09h	/
97	Update Tools' Windows executables with EraseROM command fix.	olivier.girard	4848d 08h	/
96	Fixed EraseROM command in the TCL library of the Software development tools.	olivier.girard	4848d 09h	/
95	Update some test patterns for the additional simulator supports.	olivier.girard	4851d 08h	/
94	Thanks to Mihai-Costin Manolescu's contribution, the simulation scripts now support the following simulators: - Icarus Verilog - Cver - Verilog-XL - NCVerilog - Modelsim	olivier.girard	4851d 08h	/
93	Update Tools' Windows executables.	olivier.girard	4855d 08h	/