URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] - Rev 48

Rev	Log message	Author	Age	Path
28	renamed "diligent_s3board" directory to "xilinx_diligent_s3board"	olivier.girard	5306d 11h	/
27	renamed "diligent_s3board" directory to "xilinx_diligent_s3board"	olivier.girard	5306d 11h	/
26	Xilinx implementation example: - update the project directory structure. - make a local copy of the openMSP430 core to make the project self contained.	olivier.girard	5306d 11h	/
25	FPGA Setup: Created some BAT files for WINDOWS users.	olivier.girard	5396d 09h	/
24	FPGA Setup: Created some BAT files for WINDOWS users.	olivier.girard	5396d 09h	/
23	Renamed the "openMSP430.inc" file to "openMSP430_defines.v" & added the "timescale.v" file. In order to follow the same structure as other OpenCores projects, the timescale and the defines are now included from within the Verilog files (using the `include construct).	olivier.girard	5417d 07h	/
22	Updated some links in the HTML documentation.	olivier.girard	5430d 04h	/
21	added discussion group info	olivier.girard	5442d 05h	/
20	added some SVN ignore patterns. small update to html documentation	olivier.girard	5443d 01h	/
19	added SVN property for keywords	olivier.girard	5443d 02h	/