URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] - Rev 358

Rev	Log message	Author	Age	Path
338	Tagging the 1.0rc1 candidate release of GCC 4.5.1	jeremybennett	5026d 06h	/
337	Directory for GCC 4.5.1 tags	jeremybennett	5026d 06h	/
336	Corrected for 4.5.1-or32-1.0rc1	jeremybennett	5026d 07h	/
335	Updated version number to 4.5.1-or32-1.0.	jeremybennett	5026d 07h	/
334	Record changes to the documentation and option handling.	jeremybennett	5026d 07h	/
333	Fix the default option (to use -mhard-mul). Update the documentation for OpenRISC.	jeremybennett	5026d 07h	/
332	Provide support for nested functions. Tidy up board specification. * config/or32/or32-protos.c <or32_trampoline_code_size>: Added. * config/or32/or32.c <OR32_MOVHI, OR32_ORI, OR32_LWZ, OR32_JR>: New macros added. (or32_emit_mode, or32_emit_binary, or32_force_binary) (or32_trampoline_code_size, or32_trampoline_init): Created. (or32_output_bf): Tabbing fixed. <TARGET_TRAMPOLINE_INIT>: Definition added. * config/or32/or32.h <STATIC_CHAIN_REGNUM>: Uses R11. <TRAMPOLINE_SIZE>: redefined. <TRAMPOLINE_ENVIRONMENT>: Added definition.	jeremybennett	5027d 07h	/
331	Updated for GDB 7.2 and GCC 4.5.1 (which needs target-libgcc).	jeremybennett	5027d 15h	/
330	Baseline port of GDB 7.2 for OpenRISC 1000	jeremybennett	5028d 01h	/
329	Baseline GCC 4.5.1 port for the OpenRISC 1000	jeremybennett	5028d 02h	/