URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] - Rev 387

Rev	Log message	Author	Age	Path
367	Fixup 1.0 release script	julius	5010d 23h	/
366	Version 1.0 toolchain script commit	julius	5011d 00h	/
365	Linux-2.6.34 patch update with updated USB ohs900 host	julius	5013d 18h	/
364	OR1200 passes verilator lint. Mainly fixes to widths, and all case statements altered to casez and Xs changed to ?s. OR1200 PIC default width back to 31 (was accidentally changed to ORPSoC's 20 last checkin) OR1200 spec updated to version 0.9, various updates. OR1200 in ORPSoC and main OR1200 in sync, only difference is defines.	julius	5022d 17h	/
363	ORPSoC's RTL code fixed to pass linting by Verilator. ORPSoC's debug interface disabled for now in both RTL and System C top level. Profiled building of cycle-accurate model now done correctly.	julius	5023d 02h	/
362	ORPSoCv2 verilator building working again. Board build fixes to follow	julius	5024d 12h	/
361	OPRSoCv2 - adding things left out in last check-in	julius	5024d 16h	/
360	First checkin of new ORPSoC set up - more to come, all but RTL tests temporarily broken	julius	5024d 17h	/
359	Removing duplicate OR1200 spec from docs/ path, original in or1200/doc should be used instead, also moving Japanese OR1200 spec to or1200/doc	julius	5024d 23h	/
358	OR1200's reset now configurable as active high or active low. Thanks to patch from OpenCores contributor Kuoping. Updated OR1200 in ORPSoCv2 and OR1200 project.	julius	5025d 01h	/