OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] - Rev 412

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
392 ORPSoCv2 software path reorganisation stage 1. julius 4960d 06h /
391 Removing modules no longer needed in ORPSoCv2 julius 4961d 07h /
390 Updated toolchain build scripts to use FTP server on OpenCores.org. julius 4961d 07h /
389 SD-Card boot added (sdboot) to the commands in the load file. DOS-filesystem added to support Fat12-16. Driver for SD-card added, SD and SDHC supported
Currently hardcoded to boot from vmlinux.bin		 tac2 4971d 15h /
388 Tagging the 0.5.0rc2 candidate release of Or1ksim jeremybennett 4984d 14h /
387 Fixed testing, to always use our DEJAGNU config. jeremybennett 4984d 14h /
386 Updated for release 0.5.0rc2 jeremybennett 4984d 15h /
385 Updates for Or1ksim 0.5.0rc2.

* configure: Regenerated.
* configure.ac: Minor tidy ups. Version changed to 0.5.0rc2.
* debug/rsp-server.c (rsp_query): Simplified handling of
"qTStatus" to indicate we just do not support tracing.
* doc/or1ksim.texi <Configuring the Build>: No longer mandatory to
specify the target.
<Memory Configuration>: Warns about issues with memory controller.
<Memory Controller Configuration>: Warns about issues with memory
controller and advises not to use it.
<Standalone Simulator>: Details for options with arguments updated.
* NEWS: Updated for 0.5.0rc2.
* peripheral/mc.c (mc_poc): Use constant MC_POC_VALID
(mc_index): Ensure value is valid.
* peripheral/mc-defines.h <MC_CE_VALID>: Defined.

* testsuite/test-code-or1k/configure: Regenerated.
* testsuite/test-code-or1k/configure.ac: Handle the case where
target_cpu is not set. Version changed to 0.5.0rc2.
* testsuite/test-code-or1k/support/spr-defs.h <SPR_VR_RES>:
Definition corrected.		 jeremybennett 4984d 15h /
384 Tagging the 1.0rc2 candidate release of GCC 4.5.1 jeremybennett 4985d 15h /
383 Adding makeinfo as a required tool to crossbuild-1.0.sh script julius 4985d 18h /

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.