OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] - Rev 476

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
456 ORPSoCv2 or1200 - SPRs module format and comment update. Or1200 monitor Verilog now displays report and exit l.nops to stdout by default. julius 4938d 23h /
455 Updated to support threads. Does require thread debugging enabled in uClibc. jeremybennett 4943d 01h /
454 Updated to incorporate pthreads for Linux tool chain. jeremybennett 4945d 03h /
453 Updates to support constructor/destructor initialization for uClibc. jeremybennett 4945d 14h /
452 Update to define __UCLIBC__ when using the uClibc tool chain. jeremybennett 4945d 22h /
451 More tidying up. jeremybennett 4949d 18h /
450 Simplified (and hopefully more reliable) Ethernet MAC/PHY. jeremybennett 4949d 22h /
449 ORPSoC - or1200_monitor.v additions enabling new experimental execution checks.

Replace use of "clean-all" with "distclean" as make rule to clean things.
julius 4951d 18h /
448 Changed or32 to openrisc as Linux architecture name. jeremybennett 4952d 04h /
447 Updates to register order. jeremybennett 4952d 22h /

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.