OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] - Rev 818

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
798 Added drivers for ethmac and sdcard_mass_storage_controller skrzyp 4416d 14h /
797 testsuite: kill test processes that timeout pgavin 4424d 18h /
796 Correct orpmon show_rx_buffs and show_mac_regs to use TX_BD_NUM properly. yannv 4427d 21h /
795 Created or1200_rel3 branch from rev 794 olof 4428d 12h /
794 ORPSoC, or1200: split out or1200_fpu_intfloat_conv_except module into own file

Fixes lint warnings.
julius 4433d 22h /
793 Corrected Julius Baxter's email address in MAINTAINERS jeremybennett 4444d 21h /
792 Added a MAINTAINERS file.

012-04-07 Jeremy Bennett <jeremy.bennett@embecosm.com>

* MAINTAINERS: Added.
* configure: Regenerated.
* configure.ac: Updated version.
jeremybennett 4444d 21h /
791 Added options to configure RAM and ROM sizes. Fixed cache handling. skrzyp 4447d 16h /
790 fixed issues with context switching, interrupts, optimizations and cleanups skrzyp 4454d 16h /
789 ORPSoC: Patch from R Diez to make RTL sim report l.nops have equivalent formatting to those from or1ksim

Signed-off-by: R Diez <rdiezmail-openrisc@yahoo.de>
Acked-by: Julius Baxter <juliusbaxter@gmail.com>
julius 4458d 12h /

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.