URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] - Rev 479

Rev	Log message	Author	Age	Path
459	Add option to bld-all.sh to explicitly set control load of make, and fix typos.	julius	4963d 04h	/
458	or1ksim testsuite updates	julius	4964d 03h	/
457	or1ksim - couple of ethernet peripheral updates, fixup of ethernet regression test so all tests pass again.	julius	4972d 17h	/
456	ORPSoCv2 or1200 - SPRs module format and comment update. Or1200 monitor Verilog now displays report and exit l.nops to stdout by default.	julius	4972d 18h	/
455	Updated to support threads. Does require thread debugging enabled in uClibc.	jeremybennett	4976d 20h	/
454	Updated to incorporate pthreads for Linux tool chain.	jeremybennett	4978d 22h	/
453	Updates to support constructor/destructor initialization for uClibc.	jeremybennett	4979d 09h	/
452	Update to define __UCLIBC__ when using the uClibc tool chain.	jeremybennett	4979d 17h	/
451	More tidying up.	jeremybennett	4983d 13h	/
450	Simplified (and hopefully more reliable) Ethernet MAC/PHY.	jeremybennett	4983d 17h	/