URL https://opencores.org/ocsvn/pci/pci/trunk

Subversion Repositories pci

[/] - Rev 135

Rev	Log message	Author	Age	Path
115	Added signals for WB Master B3.	tadejm	7594d 21h	/
114	This commit was manufactured by cvs2svn to create tag 'rel_7'.		7602d 00h	/
113	ifdefs moved to thier own lines, this confuses some of the tools.	simons	7602d 00h	/
112	This commit was manufactured by cvs2svn to create tag 'rel_6'.		7602d 05h	/
111	synchronizer_flop replaced with pci_synchronizer_flop, artisan ram instance updated.	simons	7602d 05h	/
110	Module that converts slave WISHBONE B3 accesses to WISHBONE B2 accesses with CAB.	mihad	7604d 04h	/
109	There was missing path to hdl.var file.	tadejm	7608d 01h	/
108	Added 'three_left_out' to pci_pciw_fifo signaling three locations before full. Added comparison between current registered cbe and next unregistered cbe to signal wb_master whether it is allowed to performe burst or not. Due to this, I needed 'three_left_out' so that writing to pci_pciw_fifo can be registered, otherwise timing problems would occure.	tadejm	7608d 01h	/
107	Added status when checking disconnect with or without data. Before it was only retry, now there is stop and retry.	tadejm	7608d 01h	/
106	Added limited WISHBONE B3 support for WISHBONE Slave Unit. Doesn't support full speed bursts yet.	mihad	7613d 00h	/