URL https://opencores.org/ocsvn/pci/pci/trunk

Subversion Repositories pci

[/] - Rev 85

Rev	Log message	Author	Age	Path
65	Cleaned up non-blocking assignments in combinatinal logic statements	mihad	7938d 05h	/
64	The testcase I just added in previous revision repaired	mihad	7938d 07h	/
63	Added additional testcase and changed rst name in BIST to trst	mihad	7938d 09h	/
62	Added BIST signals for RAMs.	mihad	7941d 02h	/
61	This commit was manufactured by cvs2svn to create tag 'rel_1'.		7949d 01h	/
60	Added support for Virtual Silicon two port RAM. Didn't run regression on it yet!	mihad	7949d 01h	/
59	Added meta flop module for easier meta stable FF identification during synthesis	mihad	7949d 03h	/
58	Removed all logic from asynchronous reset network	mihad	7954d 03h	/
57	Added completion expiration test for WB Slave unit. Changed expiration signalling	mihad	7954d 09h	/
56	Number of state bits define was removed	mihad	7955d 00h	/