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Rev Log message Author Age Path
10 Branch to develop support for parallel symbols. magro732 4061d 14h /
9 Adding the recently written PCS code, which connects the RioSerial to the Virtex-6 GTX-Quad (4-Lane SerDes) azdem 4103d 01h /
8 Adding signal descriptions in comments. magro732 4146d 15h /
7 Adding missing generic parameters to RioPacketBuffer. magro732 4233d 19h /
6 Adding RioWbBridge. Sorry, no testbench for this one. magro732 4233d 21h /
5 Uploading primitive documentation. magro732 4240d 13h /
4 Adding protocol engine implementing the hardware independent parts of the LP-serial physical specification. magro732 4263d 02h /
3 Adding RioPacketBuffer and testbench. magro732 4263d 18h /
2 Adding RioSwitch and testbench. magro732 4263d 20h /
1 The project and the structure was created root 4265d 02h /

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