URL https://opencores.org/ocsvn/rise/rise/trunk

Subversion Repositories rise

[/] - Rev 102

Rev	Log message	Author	Age	Path
82	- Updated drawings for memory.	cwalter	6411d 20h	/
81	- Changed to include barrel shifter.	cwalter	6411d 20h	/
80	- Fixed testbench to work with new barrel shifter.	cwalter	6411d 20h	/
79	- Added barrel shifter.	cwalter	6411d 20h	/
78	Added stall_in to sensitivity list.	jlechner	6411d 20h	/
77	- Fixed case.	cwalter	6411d 20h	/
76	- Changed order of some statements to improve readability.	cwalter	6411d 20h	/
75	- Added barrel shifter implementation.	cwalter	6411d 20h	/
74	- Fixed bug where register value used by load was passed through to write back. Correct is ALU value.	cwalter	6411d 22h	/
73	- Fixed bug where immediate value for LD_IMM_HB was placed in the upper 8bits. This is done by the execute stage.	cwalter	6411d 22h	/