URL https://opencores.org/ocsvn/sdhc-sc-core/sdhc-sc-core/trunk

Subversion Repositories sdhc-sc-core

[/] - Rev 50

Rev	Log message	Author	Age	Path
30	Wishbone: No wave.do	rkastl	4926d 01h	/
29	Sd: package started	rkastl	4926d 01h	/
28	Wishbone: reads and writes as procedures in the tb	rkastl	4926d 01h	/
27	Wishbone: Testbench tests a single ClassicRead	rkastl	4926d 01h	/
26	Wishbone: Changed entity to reflect the real width of iAdr	rkastl	4926d 01h	/
25	Wishbone: ClassicRead and ClassicWrite implemented, basic testbench created	rkastl	4926d 01h	/
24	Wishbone: Build fixed for splitted packages.	rkastl	4926d 01h	/
23	Wishbone: Package split into a global and a specific one.	rkastl	4926d 01h	/
22	Wishbone: Processes for statemachine created	rkastl	4926d 01h	/
21	Wishbone: Control signals into records, unfortunately signals with a width dependend on generics can not be used in records before VHDL2008.	rkastl	4926d 01h	/