URL https://opencores.org/ocsvn/sdr_ctrl/sdr_ctrl/trunk

Subversion Repositories sdr_ctrl

[/] - Rev 50

Rev	Log message	Author	Age	Path
30	test bench file for integrated SDRAM controller with wish bone and Standalone SDRAM controller test bench are added into SVN	dinesha	4518d 21h	/
29	SDRAM top and core related run file list are added into svn	dinesha	4518d 21h	/
28	SDRAM top and SDRAM Core Golden files are added into SVN	dinesha	4518d 21h	/
27	Golden log file corresponds the SDRAM core level test case are added into svn	dinesha	4519d 19h	/
26	invalid log files are removed	dinesha	4519d 20h	/
25	tb.sv is renamed as tb_top	dinesha	4519d 20h	/
24	Clean Up	dinesha	4519d 20h	/
23	Pad sdram clock added and read path register w.r.t pad sdram clock	dinesha	4521d 01h	/
22	Pad sdram clock added	dinesha	4521d 01h	/
21	Clean up	dinesha	4521d 01h	/