URL https://opencores.org/ocsvn/socgen/socgen/trunk

Subversion Repositories socgen

[/] - Rev 127

Rev	Log message	Author	Age	Path
107	added designCfg files to all modules	jt_eaton	4490d 22h	/
106	checked in orp_soc project step 2	jt_eaton	4496d 15h	/
105	moved or1200_monitor from testbench to dut	jt_eaton	4499d 11h	/
104	fixed search in preprocessor script added initial orp_soc project	jt_eaton	4501d 12h	/
103	added user guide resynced to local repository	jt_eaton	4521d 12h	/
102	all ip-xact files now readable by kactus2	jt_eaton	4583d 07h	/
101	Added new designs for minsoc release candidate convert tool set to parse proper ip-xact THIS WILL BREAK ALL THE OLD DESIGNS UNTIL I FIX THEIR IP_XACT	jt_eaton	4584d 09h	/
100	created workspace prroject=fpga_mrisc for single compile general cleanup	jt_eaton	4596d 17h	/
99	moved all projects into /projects/opencores.org added build_register added fizzim	jt_eaton	4639d 09h	/
98	removed unneeded sim	jt_eaton	4675d 13h	/