URL https://opencores.org/ocsvn/tv80/tv80/trunk

Subversion Repositories tv80

[/] - Rev 116

Rev	Log message	Author	Age	Path
96	Added Z80 op decode to environment, enabled by -k switch	ghutchis	5301d 00h	/
95	Updated regression script to use SystemC simulation	ghutchis	5302d 19h	/
94	Ported over env_io.v from Verilog environment to tv_responder. Basic tests from Verilog environment (hello, fib) now passing in SystemC environment.	ghutchis	5304d 20h	/
93	Added common header file for all systemc environment	ghutchis	5305d 18h	/
92	Added responder to top level, beginning of support for ihex load	ghutchis	5309d 20h	/
91	Preliminary support for SystemC/Verilator environment	ghutchis	5309d 22h	/
90	Fixed syntax errors in core preventing Verilator from compiling. Added new capability to register generator to make registers which latch on an external event. Removed spurious copyright notice.	ghutchis	5309d 22h	/
89	RTL and environment fixes for nmi bug	ghutchis	5330d 01h	/
88	Fixed bug introduced by conversion of mcycle to one-hot FSM	ghutchis	5331d 16h	/
87	Added additional ifdef signals to remove unneede R (refresh) register	ghutchis	5346d 23h	/