URL https://opencores.org/ocsvn/xulalx25soc/xulalx25soc/trunk

Subversion Repositories xulalx25soc

[/] - Rev 39

Rev	Log message	Author	Age	Path
19	Step one in fixing soft link poblems. The following files were soft links, and not brought into the svn repository properly. They'll be replaced in the next update with their full sources.	dgisselq	3068d 06h	/
18	Got the bitfile back up to speed at 80 MHz.	dgisselq	3071d 20h	/
17	Some basic updates, to include adding in a missing file (zipstate). Most of these updates include making sure that the XuLA2 device can be accessed via the USB. (Prior versions accessed the FPGA via serial port or network ...)	dgisselq	3071d 20h	/
16	Updates to allow a test of the ICAP configuration interface.	dgisselq	3071d 21h	/
15	WORKING VERSION! ... or, at least the memory test works.	dgisselq	3073d 16h	/
14	Quick bug fix.	dgisselq	3073d 16h	/
13	This version is now working. (It probably would've worked before, but everything is now working.)	dgisselq	3073d 16h	/
12	Modified to match the settings I'm now using within ISE.	dgisselq	3073d 19h	/
11	Getting software up and running on the board for the first time. (Not there yet, but I think these items have now proven themselves.)	dgisselq	3073d 19h	/
10	Changed the name of the memtest.s file.	dgisselq	3073d 19h	/