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Rev Log message Author Age Path
77 Adds register names and values for the SD card interface. dgisselq 2940d 01h /
76 Now tries to avoid reading from the stack if the stack addresses are already
known to be bad. That way, the debugger tries to preserve any bus error address
already on the buserr device.
dgisselq 2940d 01h /
75 Added simulation capability for the SD-Card, as well as debugging output for the
DMA. (The SD-Card debug may not be fully featured, yet, but it has gotten me
to where I can talk to the card.)
dgisselq 2940d 01h /
74 Adds the SD-card capability, and connects the debug wires to/from the uartdev
in case it needs to be debugged.
dgisselq 2940d 01h /
73 Simplified logic. dgisselq 2940d 01h /
72 Sets XULA25 as the default. dgisselq 2940d 01h /
71 Needed to play with subtle timing to get this to build. Expect me to play
with these two clock numbers more.
dgisselq 2940d 01h /
70 Cosmetic (minor) update. dgisselq 2940d 01h /
69 Massive logic simplification. This is also the first (verified) working
version.
dgisselq 2940d 01h /
68 Fixes the debug ack line, so it no longer acks when there isn't a dbg_stb.
Fixed the multiply option parameter, so it sets a 3-clock multiply properly.
Adjusted the watchdog timer so that it now produces a timer that doesn't
reload--since this is pointless for a watchdog. Finally, connects a reset
line to the DMA, to make certain that resetting the CPU will also reset any
ongoing DMA operation.
dgisselq 2940d 01h /

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