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Rev Log message Author Age Path
171 NCSIM simulation environment added. mohor 7926d 00h /
170 Headers changed. mohor 7926d 00h /
169 New testbench. Thanks to Tadej M - "The Spammer". mohor 7926d 01h /
168 CarrierSenseLost bug fixed when operating in full duplex mode. mohor 7926d 22h /
167 Sometimes both RxB_IRQ and RxE_IRQ were activated. Bug fixed. mohor 7927d 22h /
166 Reception is possible after RxPointer is read and not after BD is read. For
that reason RxBDReady is changed to RxReady.
Busy_IRQ interrupt connected. When there is no RxBD ready and frame
comes, interrupt is generated.		 mohor 7928d 23h /
165 HASH improvement needed. mohor 7929d 02h /
164 Ethernet debug registers removed. mohor 7929d 02h /
163 Another temporary version. Core is almost finished. Testbench not included,
yet"		 mohor 7929d 18h /
162 Another temporary version. Core is almost finished. Testbench not included,
yet.		 mohor 7929d 18h /
161 Error acknowledge is generated when accessing BDs and RST bit in the
MODER register (r_Rst) is set.		 mohor 7930d 00h /
160 error acknowledge cycle termination added to display. mohor 7930d 00h /
159 Async reset for WB_ACK_O removed (when core was in reset, it was
impossible to access BDs).
RxPointers and TxPointers names changed to be more descriptive.
TxUnderRun synchronized.		 mohor 7930d 20h /
158 Typo fixed. mohor 7930d 21h /
157 This testbench will soon be obsolete. Please use tb_ethernet.v mohor 7933d 02h /
156 Valid testbench. mohor 7933d 02h /
155 Minor changes. mohor 7933d 02h /
154 Design document is still under construction. mohor 7934d 01h /
153 Temp version (backup). mohor 7934d 16h /
152 Version 1.16 created. See revision history in the document for details. mohor 7934d 16h /

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