URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] - Rev 350

Rev	Log message	Author	Age	Path
350	Turn M[1-2]_ADDRESSED_S[1-2] defines into wires	olof	4702d 14h	/
349	Make all parameters configurable from top level	olof	4703d 15h	/
348	Added option to dump VCD files	olof	4704d 14h	/
347	Added information about running with Icarus Verilog	olof	4704d 14h	/
346	Updated project location	olof	4704d 16h	/
345	Temporarily disable failing tests	olof	4704d 18h	/
344	bit 9 in phy control register is self clearing	olof	4710d 20h	/
343	Address miss should not be asserted on short frames	olof	4714d 16h	/
342	Added cast to avoid inequality when comparing different data types	olof	4714d 16h	/
341	Reset AdressMiss signal on new frames to prevent reporting the old status if new frame is short	olof	4714d 16h	/
340	Don't fail if log dir already exists	olof	4715d 14h	/
339	Added basic support for Icarus Verilog	olof	4716d 13h	/
338		root	5508d 19h	/
337		root	5564d 21h	/
336	Added old uploaded documents to new repository.	root	5566d 00h	/
335	New directory structure.	root	5566d 00h	/
334	Minor fixes for Icarus simulator.	igorm	7014d 02h	/
333	Some small fixes + some troubles fixed.	igorm	7014d 14h	/
332	Case statement improved for synthesys.	igorm	7027d 19h	/
331	Tests for delayed CRC and defer indication added.	igorm	7042d 21h	/