URL https://opencores.org/ocsvn/mlite/mlite/trunk

Subversion Repositories mlite

[/] - Rev 131

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

From rev	To rev	Max revs

Search for

Rev	Log message	Author	Age	Path
131	Changed "GENERIC" to "DEFAULT" to be Xilinx friendly.	rhoads	7187d 10h	/
130	Added better spacing	rhoads	7187d 10h	/
129	Added reset_in to sensitivity list	rhoads	7206d 10h	/
128	Reset all registers, constants now upper case.	rhoads	7324d 21h	/
127	This commit was manufactured by cvs2svn to create tag 'V2_1'.		7343d 10h	/
126	Added note that CC is for x86 and gmake has problems with MIPS gcc libraries.	rhoads	7343d 10h	/
125	Fixed pc_source_type comment.	rhoads	7343d 10h	/
124	Holger Lohn's fix for interrupts when 3-state pipeline enabled.	rhoads	7343d 10h	/
123	Uncomment out the Altera portion. Xilinx users may need to re-comment out this section.	rhoads	7410d 11h	/
122	Added comment to explain why c_bus isn't delayed but reg_dest is delayed.	rhoads	7474d 11h	/
121	Added Matthias Gruenewald's tri-state area-optimized option	rhoads	7486d 00h	/
120	Make generics "GENERIC"	rhoads	7486d 00h	/
119	Opcodes from count.c	rhoads	7524d 11h	/
118	Merged Matthias Grunewald's changes to use tri-state for smaller Xilinx FPGA.	rhoads	7524d 11h	/
117	Part of Matthias Grunewald's changes to use tri-state for smaller Xilinx FPGA.	rhoads	7524d 11h	/
116	Matthias Grunewald's changes to use tri-state for smaller Xilinx FPGA.	rhoads	7524d 11h	/
115	Matthias Grunewald's changes for Xilinx FPGA dual-port RAM.	rhoads	7524d 11h	/
114	Matthias Grunewald's changes to get synthesis to work with Synopsys' FPGA Compiler II.	rhoads	7524d 11h	/
113	Matthias Grunewald's bug fixes: Branch and compare instructions didn't interpret immediate as signed.	rhoads	7524d 11h	/
112	Merged Matthias Grunewald's changes to use tri-state for smaller Xilinx FPGA.	rhoads	7524d 11h	/

1 2 Next >

Show All

Browse

Tools

Subversion Repositories mlite

[/] - Rev 131

Filtering Options