URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] [8051/] [tags/] [rel_2/] - Rev 77

Rev	Log message	Author	Age	Path
77	substitute modules oc8051_ram_wr_sel and oc8051ram_rd_sel with oc8051_ram_addr_sel	simont	7921d 07h	/8051/tags/rel_2
76	add module oc8051_sfr, 256 bytes internal ram	simont	7921d 07h	/8051/tags/rel_2
75	initial import	simont	7921d 07h	/8051/tags/rel_2
74	add module oc8051_wb_iinterface	simont	7929d 08h	/8051/tags/rel_2
73	initial import	simont	7929d 08h	/8051/tags/rel_2
72	fix bug in interface to external data ram	simont	7929d 09h	/8051/tags/rel_2
71	add cache	simont	7933d 09h	/8051/tags/rel_2
70	initial import	simont	7933d 09h	/8051/tags/rel_2
69	add parameters	simont	7933d 11h	/8051/tags/rel_2
68	add instruction cache and DELAY parameters for external ram, rom	simont	7933d 11h	/8051/tags/rel_2
67	add parameters for instruction cache	simont	7933d 11h	/8051/tags/rel_2
66	added xrom_test	simont	7934d 07h	/8051/tags/rel_2
65	add oc8051_icache and oc8051_cache_ram	simont	7934d 07h	/8051/tags/rel_2
64	signal es_int=1'b0	simont	7934d 07h	/8051/tags/rel_2
63	initial import	simont	7934d 07h	/8051/tags/rel_2
62	fix bugs in instruction interface	simont	7934d 07h	/8051/tags/rel_2
61	fix bug	simont	7935d 10h	/8051/tags/rel_2
60	initial inport	simont	7936d 10h	/8051/tags/rel_2
59	add external rom	simont	7940d 05h	/8051/tags/rel_2
58	add external rom testing	simont	7940d 05h	/8051/tags/rel_2