URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] [8051/] [tags/] [rel_2] - Rev 28

Rev	Log message	Author	Age	Path
28	remove syn signal	simont	8025d 19h	/8051/tags/rel_2
27	fix some bugs	simont	8025d 19h	/8051/tags/rel_2
26	main divider logic was optimized not optimized by compiler, so I did it by hand	markom	8025d 21h	/8051/tags/rel_2
25	divider and multiplier pass test	markom	8026d 16h	/8051/tags/rel_2
24	intensively tests all instructions	markom	8026d 20h	/8051/tags/rel_2
23	mul & div use 4 clocks	simont	8027d 11h	/8051/tags/rel_2
22	fix some bugs	simont	8027d 11h	/8051/tags/rel_2
21	mul bug fixed	markom	8027d 16h	/8051/tags/rel_2
20	multiplier and divider changed so they complete in 4 cycles	markom	8027d 18h	/8051/tags/rel_2
19	combinatorial loop removed	simont	8028d 11h	/8051/tags/rel_2
18	rst signal added	simont	8031d 16h	/8051/tags/rel_2
17	fix some bugs	simont	8031d 16h	/8051/tags/rel_2
16	inputs ram and op2 removed	simont	8031d 16h	/8051/tags/rel_2
15	commbinatorial loop removed	simont	8031d 16h	/8051/tags/rel_2
14	added signal ea_int	simont	8031d 18h	/8051/tags/rel_2
13	some bug fix	simont	8032d 15h	/8051/tags/rel_2
12	des1_r in alu port list	simont	8032d 15h	/8051/tags/rel_2
11	des2_r removed	simont	8032d 15h	/8051/tags/rel_2
10	% replaced with ^ in uart; some minor improvements	markom	8032d 21h	/8051/tags/rel_2
9	removed unused compare states	markom	8034d 14h	/8051/tags/rel_2