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Rev Log message Author Age Path
191 New directory structure. root 5601d 17h /aemb/branches/AEMB2_712
77 This commit was manufactured by cvs2svn to create branch 'AEMB2_712'. 6059d 17h /branches/AEMB2_712
76 initial sybreon 6059d 17h /trunk
74 Minor code cleanup. sybreon 6066d 18h /trunk
73 Moved simulation kernel into code. sybreon 6066d 19h /trunk
72 Minor code cleanup. sybreon 6066d 19h /trunk
71 Old version deprecated. sybreon 6073d 22h /trunk
70 Change interrupt to positive level triggered interrupts. sybreon 6074d 20h /trunk
69 Removed unnecessary byte acrobatics with VMEM data. sybreon 6076d 17h /trunk
68 Generate VMEM instead of HEX dumps of programme. sybreon 6076d 17h /trunk
67 Minor simulation fixes. sybreon 6078d 16h /trunk
66 Added fsl_tag_o to FSL bus (tag either address or data). sybreon 6080d 14h /trunk
65 Fixed minor typo causing synthesis failure. sybreon 6082d 02h /trunk
64 Fixed minor interrupt test typo. sybreon 6082d 12h /trunk
63 Fixed interrupt signal synchronisation. sybreon 6082d 12h /trunk
62 Fixed minor typo. sybreon 6082d 12h /trunk
61 Changed interrupt handling system (reported by M. Ettus). sybreon 6082d 13h /trunk
60 Added interrupt test routine. sybreon 6082d 13h /trunk
59 Added posedge/negedge bus interface.
Modified interrupt test system.
sybreon 6082d 13h /trunk
58 Updated simulation to also check BRI 0x00 instruction. sybreon 6083d 12h /trunk

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