OpenCores
URL https://opencores.org/ocsvn/aemb/aemb/trunk

Subversion Repositories aemb

[/] [aemb/] [branches/] [AEMB2_712/] - Rev 203

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
191 New directory structure. root 5590d 04h /aemb/branches/AEMB2_712
77 This commit was manufactured by cvs2svn to create branch 'AEMB2_712'. 6048d 04h /branches/AEMB2_712
76 initial sybreon 6048d 04h /trunk
74 Minor code cleanup. sybreon 6055d 05h /trunk
73 Moved simulation kernel into code. sybreon 6055d 05h /trunk
72 Minor code cleanup. sybreon 6055d 06h /trunk
71 Old version deprecated. sybreon 6062d 08h /trunk
70 Change interrupt to positive level triggered interrupts. sybreon 6063d 07h /trunk
69 Removed unnecessary byte acrobatics with VMEM data. sybreon 6065d 04h /trunk
68 Generate VMEM instead of HEX dumps of programme. sybreon 6065d 04h /trunk
67 Minor simulation fixes. sybreon 6067d 03h /trunk
66 Added fsl_tag_o to FSL bus (tag either address or data). sybreon 6069d 01h /trunk
65 Fixed minor typo causing synthesis failure. sybreon 6070d 13h /trunk
64 Fixed minor interrupt test typo. sybreon 6070d 23h /trunk
63 Fixed interrupt signal synchronisation. sybreon 6070d 23h /trunk
62 Fixed minor typo. sybreon 6070d 23h /trunk
61 Changed interrupt handling system (reported by M. Ettus). sybreon 6071d 00h /trunk
60 Added interrupt test routine. sybreon 6071d 00h /trunk
59 Added posedge/negedge bus interface.
Modified interrupt test system.
sybreon 6071d 00h /trunk
58 Updated simulation to also check BRI 0x00 instruction. sybreon 6071d 23h /trunk

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.