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[/] [can/] [tags/] [asyst_3/] [rtl/] [verilog/] - Rev 161

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Rev Log message Author Age Path
161 New directory structure. root 5637d 08h /can/tags/asyst_3/rtl/verilog
132 This commit was manufactured by cvs2svn to create tag 'asyst_3'. 7607d 22h /can/tags/asyst_3/rtl/verilog
130 mbist signals updated according to newest convention markom 7607d 22h /can/tags/asyst_3/rtl/verilog
129 Error counters changed. mohor 7624d 07h /can/tags/asyst_3/rtl/verilog
126 Error counters fixed to be compatible with Bosch VHDL reference model.
Small synchronization changes.		 mohor 7625d 03h /can/tags/asyst_3/rtl/verilog
125 Synchronization changed, error counters fixed. mohor 7629d 09h /can/tags/asyst_3/rtl/verilog
124 ALTERA_RAM supported. mohor 7649d 15h /can/tags/asyst_3/rtl/verilog
121 When detecting bus-free, signal bus_free_cnt_en was cleared to zero
although the last sampled bit was zero instead of one.		 mohor 7656d 21h /can/tags/asyst_3/rtl/verilog
118 Artisan RAM fixed (when not using BIST). mohor 7665d 18h /can/tags/asyst_3/rtl/verilog
117 Tristate signal tx_o is separated to tx_o and tx_oen_o. Both signals need
to be joined together on higher level.		 mohor 7665d 18h /can/tags/asyst_3/rtl/verilog
115 Artisan ram instances added. simons 7671d 12h /can/tags/asyst_3/rtl/verilog
112 Tx and rx length are limited to 8 bytes regardless to the DLC value. tadejm 7698d 13h /can/tags/asyst_3/rtl/verilog
111 Fixed according to the linter.
Case statement for data_out joined.		 mohor 7700d 13h /can/tags/asyst_3/rtl/verilog
110 Fixed according to the linter. mohor 7700d 13h /can/tags/asyst_3/rtl/verilog
109 Fixed according to the linter. mohor 7700d 14h /can/tags/asyst_3/rtl/verilog
108 Fixed according to the linter. mohor 7700d 14h /can/tags/asyst_3/rtl/verilog
107 Fixed according to the linter. mohor 7700d 15h /can/tags/asyst_3/rtl/verilog
106 Unused signal removed. mohor 7706d 12h /can/tags/asyst_3/rtl/verilog
104 Synchronization fixed. In some strange cases it didn't work according to
the VHDL reference model.		 tadejm 7707d 02h /can/tags/asyst_3/rtl/verilog
102 Little fixes (to fix warnings). mohor 7709d 17h /can/tags/asyst_3/rtl/verilog

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