OpenCores
URL https://opencores.org/ocsvn/can/can/trunk

Subversion Repositories can

[/] [can/] [trunk/] [rtl/] - Rev 138

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
138 Header changed. Address latched to posedge. bus_off_on signal added. mohor 7461d 02h /can/trunk/rtl
137 Header changed. mohor 7461d 03h /can/trunk/rtl
136 Error counters changed. mohor 7461d 03h /can/trunk/rtl
135 Header changed. mohor 7461d 03h /can/trunk/rtl
134 Active high/low problem when Altera devices are used. Bug fixed by
Rojhalat Ibrahim.
mohor 7569d 00h /can/trunk/rtl
130 mbist signals updated according to newest convention markom 7575d 11h /can/trunk/rtl
129 Error counters changed. mohor 7591d 20h /can/trunk/rtl
126 Error counters fixed to be compatible with Bosch VHDL reference model.
Small synchronization changes.
mohor 7592d 16h /can/trunk/rtl
125 Synchronization changed, error counters fixed. mohor 7596d 22h /can/trunk/rtl
124 ALTERA_RAM supported. mohor 7617d 05h /can/trunk/rtl
121 When detecting bus-free, signal bus_free_cnt_en was cleared to zero
although the last sampled bit was zero instead of one.
mohor 7624d 10h /can/trunk/rtl
118 Artisan RAM fixed (when not using BIST). mohor 7633d 07h /can/trunk/rtl
117 Tristate signal tx_o is separated to tx_o and tx_oen_o. Both signals need
to be joined together on higher level.
mohor 7633d 07h /can/trunk/rtl
115 Artisan ram instances added. simons 7639d 01h /can/trunk/rtl
112 Tx and rx length are limited to 8 bytes regardless to the DLC value. tadejm 7666d 02h /can/trunk/rtl
111 Fixed according to the linter.
Case statement for data_out joined.
mohor 7668d 02h /can/trunk/rtl
110 Fixed according to the linter. mohor 7668d 02h /can/trunk/rtl
109 Fixed according to the linter. mohor 7668d 03h /can/trunk/rtl
108 Fixed according to the linter. mohor 7668d 04h /can/trunk/rtl
107 Fixed according to the linter. mohor 7668d 04h /can/trunk/rtl

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.