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[/] [dbg_interface/] [tags/] [rel_19/] [bench/] - Rev 102

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Rev Log message Author Age Path
102 New version. mohor 7469d 08h /dbg_interface/tags/rel_19/bench
101 Almost finished. mohor 7469d 09h /dbg_interface/tags/rel_19/bench
99 cpu registers added. mohor 7470d 11h /dbg_interface/tags/rel_19/bench
96 Working. mohor 7471d 15h /dbg_interface/tags/rel_19/bench
95 Temp version. mohor 7472d 03h /dbg_interface/tags/rel_19/bench
93 tmp version. mohor 7473d 15h /dbg_interface/tags/rel_19/bench
92 temp version. mohor 7476d 18h /dbg_interface/tags/rel_19/bench
91 tmp version. mohor 7477d 13h /dbg_interface/tags/rel_19/bench
90 tmp version. mohor 7478d 08h /dbg_interface/tags/rel_19/bench
89 temp4 version. mohor 7479d 14h /dbg_interface/tags/rel_19/bench
88 temp3 version. mohor 7480d 09h /dbg_interface/tags/rel_19/bench
87 tmp2 version. mohor 7481d 14h /dbg_interface/tags/rel_19/bench
80 New version of the debug interface. Not finished, yet. mohor 7494d 12h /dbg_interface/tags/rel_19/bench
75 Simulation files. mohor 7555d 10h /dbg_interface/tags/rel_19/bench
73 CRC logic changed. mohor 7555d 10h /dbg_interface/tags/rel_19/bench
63 Three more chains added for cpu debug access. simons 7611d 12h /dbg_interface/tags/rel_19/bench
47 mon_cntl_o signals that controls monitor mux added. mohor 8089d 11h /dbg_interface/tags/rel_19/bench
38 Few outputs for boundary scan chain added. mohor 8145d 12h /dbg_interface/tags/rel_19/bench
36 Structure changed. Hooks for jtag chain added. mohor 8149d 11h /dbg_interface/tags/rel_19/bench
17 dbg_timescale.v changed to timescale.v This is done for the simulation of
few different cores in a single project.		 mohor 8289d 14h /dbg_interface/tags/rel_19/bench

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