URL https://opencores.org/ocsvn/dbg_interface/dbg_interface/trunk

Subversion Repositories dbg_interface

[/] [dbg_interface/] [tags/] [rel_19/] [bench] - Rev 112

Rev	Log message	Author	Age	Path
112	dbg_tb_defines.v not used.	mohor	7508d 08h	/dbg_interface/tags/rel_19/bench
111	Define tap_defines.v added to test bench.	mohor	7508d 09h	/dbg_interface/tags/rel_19/bench
110	Waiting for "ready" improved.	mohor	7508d 09h	/dbg_interface/tags/rel_19/bench
102	New version.	mohor	7510d 04h	/dbg_interface/tags/rel_19/bench
101	Almost finished.	mohor	7510d 05h	/dbg_interface/tags/rel_19/bench
99	cpu registers added.	mohor	7511d 07h	/dbg_interface/tags/rel_19/bench
96	Working.	mohor	7512d 11h	/dbg_interface/tags/rel_19/bench
95	Temp version.	mohor	7512d 23h	/dbg_interface/tags/rel_19/bench
93	tmp version.	mohor	7514d 10h	/dbg_interface/tags/rel_19/bench
92	temp version.	mohor	7517d 14h	/dbg_interface/tags/rel_19/bench
91	tmp version.	mohor	7518d 09h	/dbg_interface/tags/rel_19/bench
90	tmp version.	mohor	7519d 04h	/dbg_interface/tags/rel_19/bench
89	temp4 version.	mohor	7520d 10h	/dbg_interface/tags/rel_19/bench
88	temp3 version.	mohor	7521d 05h	/dbg_interface/tags/rel_19/bench
87	tmp2 version.	mohor	7522d 10h	/dbg_interface/tags/rel_19/bench
80	New version of the debug interface. Not finished, yet.	mohor	7535d 07h	/dbg_interface/tags/rel_19/bench
75	Simulation files.	mohor	7596d 05h	/dbg_interface/tags/rel_19/bench
73	CRC logic changed.	mohor	7596d 06h	/dbg_interface/tags/rel_19/bench
63	Three more chains added for cpu debug access.	simons	7652d 08h	/dbg_interface/tags/rel_19/bench
47	mon_cntl_o signals that controls monitor mux added.	mohor	8130d 07h	/dbg_interface/tags/rel_19/bench