URL https://opencores.org/ocsvn/dbg_interface/dbg_interface/trunk

Subversion Repositories dbg_interface

[/] [dbg_interface/] [tags/] [rel_19/] [rtl/] - Rev 123

Rev	Log message	Author	Age	Path
123	All flipflops are reset.	mohor	7478d 10h	/dbg_interface/tags/rel_19/rtl
121	Port signals are all set to zero after reset.	mohor	7481d 10h	/dbg_interface/tags/rel_19/rtl
119	cpu_stall_o activated as soon as bp occurs.	mohor	7481d 13h	/dbg_interface/tags/rel_19/rtl
117	Define name changed.	mohor	7483d 09h	/dbg_interface/tags/rel_19/rtl
108	Reset values width added because of FV, a good sentence changed because some tools can not handle it.	simons	7484d 16h	/dbg_interface/tags/rel_19/rtl
106	Sensitivity list updated.	simons	7485d 14h	/dbg_interface/tags/rel_19/rtl
104	cpu_tall_o is set with cpu_stb_o or register.	mohor	7486d 05h	/dbg_interface/tags/rel_19/rtl
102	New version.	mohor	7486d 06h	/dbg_interface/tags/rel_19/rtl
101	Almost finished.	mohor	7486d 07h	/dbg_interface/tags/rel_19/rtl
100	* empty log message *	mohor	7487d 09h	/dbg_interface/tags/rel_19/rtl
99	cpu registers added.	mohor	7487d 09h	/dbg_interface/tags/rel_19/rtl
97	Working.	mohor	7488d 11h	/dbg_interface/tags/rel_19/rtl
95	Temp version.	mohor	7489d 01h	/dbg_interface/tags/rel_19/rtl
94	temp version. Resets will be changed in next version.	mohor	7489d 11h	/dbg_interface/tags/rel_19/rtl
93	tmp version.	mohor	7490d 12h	/dbg_interface/tags/rel_19/rtl
92	temp version.	mohor	7493d 16h	/dbg_interface/tags/rel_19/rtl
91	tmp version.	mohor	7494d 11h	/dbg_interface/tags/rel_19/rtl
90	tmp version.	mohor	7495d 06h	/dbg_interface/tags/rel_19/rtl
89	temp4 version.	mohor	7496d 12h	/dbg_interface/tags/rel_19/rtl
88	temp3 version.	mohor	7497d 06h	/dbg_interface/tags/rel_19/rtl