URL https://opencores.org/ocsvn/eco32/eco32/trunk

Subversion Repositories eco32

[/] [eco32/] [trunk/] [fpga/] - Rev 216

Rev	Log message	Author	Age	Path
216	organizing hardware	hellwig	3646d 15h	/eco32/trunk/fpga
215	organizing hardware	hellwig	3646d 15h	/eco32/trunk/fpga
204	changed TLB behavior on tbs instructions	hellwig	3658d 10h	/eco32/trunk/fpga
197	IDE interface byte-order problem solved	hellwig	3667d 12h	/eco32/trunk/fpga
192	board I/O for XSA board	hellwig	3670d 08h	/eco32/trunk/fpga
191	board I/O for XSA board	hellwig	3670d 10h	/eco32/trunk/fpga
190	board-specific I/O module added	hellwig	3670d 15h	/eco32/trunk/fpga
181	hardware got BadAccess register; synthesizer result eco32.bit now included	hellwig	3676d 07h	/eco32/trunk/fpga
129	hardware: clock/reset update	hellwig	3830d 14h	/eco32/trunk/fpga
128	hardware: clock/reset update	hellwig	3830d 15h	/eco32/trunk/fpga
127	hardware: clock/reset update	hellwig	3831d 01h	/eco32/trunk/fpga
126	hardware: ram pin ordering	hellwig	3831d 13h	/eco32/trunk/fpga
125	hardware: cpu external pin ordering	hellwig	3831d 14h	/eco32/trunk/fpga
124	hardware: busctrl source formatted	hellwig	3831d 23h	/eco32/trunk/fpga
123	hardware: dsp now equivalent to port-15	hellwig	3832d 02h	/eco32/trunk/fpga
122	hardware: in sdramcntl.v signal added to sensitivity list	hellwig	3832d 08h	/eco32/trunk/fpga
121	hardware: dsk source formatted	hellwig	3832d 12h	/eco32/trunk/fpga
120	hardware: in cpu/sregs change signal names di->din, do->dout	hellwig	3832d 14h	/eco32/trunk/fpga
119	hardware: ram now equivalent to port-15	hellwig	3833d 00h	/eco32/trunk/fpga
118	hardware: rom now equivalent to port-15	hellwig	3833d 13h	/eco32/trunk/fpga