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[/] [ethmac/] [tags/] [rel_2/] - Rev 87

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Rev Log message Author Age Path
87 Status was not latched correctly sometimes. Fixed. mohor 8122d 03h /ethmac/tags/rel_2
86 Big Endian problem when sending frames fixed. mohor 8123d 10h /ethmac/tags/rel_2
85 Log info was missing. mohor 8128d 20h /ethmac/tags/rel_2
84 LinkFail signal was not latching appropriate bit. mohor 8128d 20h /ethmac/tags/rel_2
83 MAC address recognition was not correct (bytes swaped). mohor 8128d 20h /ethmac/tags/rel_2
82 Byte ordering changed (Big Endian used). casex changed with case because
Xilinx Foundation had problems. Tested in HW. It WORKS.		 mohor 8128d 21h /ethmac/tags/rel_2
81 Typos fixed, INT_SOURCE and INT_MASK registers changed. mohor 8128d 22h /ethmac/tags/rel_2
80 Small fixes for external/internal DMA missmatches. mohor 8133d 00h /ethmac/tags/rel_2
79 RetryCntLatched was unused and removed from design mohor 8133d 00h /ethmac/tags/rel_2
78 WB_SEL_I was unused and removed from design mohor 8133d 00h /ethmac/tags/rel_2
77 Interrupts changed mohor 8133d 00h /ethmac/tags/rel_2
76 Interrupts changed in the top file mohor 8133d 00h /ethmac/tags/rel_2
75 r_Bro is used for accepting/denying frames mohor 8133d 00h /ethmac/tags/rel_2
74 Reset values are passed to registers through parameters mohor 8133d 00h /ethmac/tags/rel_2
73 Number of interrupts changed mohor 8133d 00h /ethmac/tags/rel_2
72 Retry is not activated when a Tx Underrun occured mohor 8137d 04h /ethmac/tags/rel_2
71 Address recognition system added. Buffer Descriptors changed. DMA section
changed. Ports changed.		 mohor 8141d 05h /ethmac/tags/rel_2
70 Small fixes. mohor 8141d 06h /ethmac/tags/rel_2
69 Define missmatch fixed. mohor 8142d 03h /ethmac/tags/rel_2
68 Registered trimmed. Unused registers removed. mohor 8143d 03h /ethmac/tags/rel_2

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